Silicon on Insulator (SoI) is a chip technology with a special insulation layer of silicon oxide embedded in the silicon substrate. The individual components on the chip are isolated from each other by oxide insulation.
Each individual transistor of an SoI chip is located on a completely isolated surface. Between the individual components are narrow webs that isolate adjacent components from each other, thus preventing unwanted mutual interference and leakage currents.
The SoI technology has the advantage that it is less sensitive to interference radiation and mutual interference of the active components than other chip technologies. The transistors have a lower capacitance and can therefore be switched faster. In addition, SoI chips produce lower power dissipation.
There is an SoI consortium in which many chip manufacturers have joined forces. The aim of the consortium is to promote SoI manufacturing technology.
The further development of the SoI technology leads to Fully Depleted Silicon on Insulator( FD-SoI). This technology works with silicon channel areas between drain and source of 10 nm to 30 nm. Due to the extremely small dimensions, this channel region does not need to be doped.