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phase locked loop (PLL)

  1. Phase Locked Loop (PLL) is a phase synchronously controlled oscillator. In the PLL process, the phase position of a voltage controlled oscillator (VCO) in a comparator or phase discriminator is compared with a reference phase position and a control voltage is obtained from the deviation, which is used to readjust the phase position of the oscillator several times a second.

    Principle of the phase-locked loop (PLL)

    Principle of the phase-locked loop (PLL)

    The control is phase-synchronous, so that one can speak of a phase-locked coupling between the oscillator and the reference phase position. The accuracy of PLLs is 0.001%, which is about 200 times better than that of a Variable Frequency Oscillator (VFO).

    Phase-locked oscillators are used in professional broadcast equipment. They are also used for synchronous clock regeneration and synchronous frequency multiplication.

  2. In phase-locked loop data transmission, the timing information is transmitted with the data. The receiving device filters the timing information from the received signal and binds its internal clock to the timing signal.

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Englisch: phase locked loop - PLL
Updated at: 08.07.2011
#Words: 125
Translations: DE