Pipelining accelerates the processing speed of processors by processing instructions in parallel. In pipelining, instructions are subdivided into subinstructions in each processing stage and these are processed in each case by separate processors with their own memory unit or by execution units connected in parallel. The sub-instructions may well be subdivided into even smaller operations.
The instruction cycle of pipelining is characterized by several phases. In this process, preprocessing takes place, which is characterized by fetching and decoding the partial instructions. The subsequent loading of the operands and the incrementing of the instruction count register are followed by processing and result storage.