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explicit parallel instruction computing (CPU) (EPIC)

The EPIC computer architecture(Explicit Parallel Instruction Computing) is a RISC architecture, Reduced Instruction Set Computer (RISC), with a 128 bit wide data bus and a usable data word width of 64 bits for processing very long instruction words.

The EPIC concept corresponds to the VLIW (Very Long Instruction Word) architecture. The EPIC architecture launched by Intel works with 40-bit instructions and has more than 128 floating point registers. In the EPIC architecture, three 40-bit instructions are combined into a bundle in each case. The resulting data packet is supplemented by a mask of 8 bits, which contains the information about which 40-bit instructions are processed in parallel.

The EPIC architecture is used by Intel and Hewlett Packard.

Informations:
Englisch: explicit parallel instruction computing (CPU) - EPIC
Updated at: 10.03.2008
#Words: 114
Links: computer architecture, reduced instruction set computer (RISC), data bus, word, instruction
Translations: DE
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