The technology used in Reduced Latency DRAMs (RLDRAM) aims to reduce latency in Dynamic RAMs( DRAM). The technology, developed by Infineon and Micron, is intended to close the gap between fast static RAMs and slower dynamic ones.
Conceptually, RLDRAMs work with DRAM cells in which the eight memory banks are arranged more optimally. To reduce reflections, the memory bus is terminated directly in the memory chip. This on-die termination( ODT) eliminates reflections and signal distortion and reduces bus termination costs. In addition, RLDRAMs have multiplexed and non-multiplexed addressing, they have common or separate inputs/outputs, and programmable output impedances.
The second-generation RLDRAMs have memory capacities of 256 Mbit and operate at a clock frequency of 400 MHz, achieving data transfer rates of up to 28.8 Gbit/s in conjunction with the 36-bit-wideinterface. The access times of 20 ns are far below those of Dynamic RAMs (DRAM) and already close to the range of Static RAMs (SRAMs).
Because of its enormously short latency of around 20 ns, RLDRAM is particularly suitable for network applications, for example in Gigagit Ethernet, 10 Gigabit Ethernet( 10GbE), 10 Gigabit Fibre Channel( 10GFC) or Terabit routers, for use in consumer electronics, on graphics cards and as a Level 3 cache.