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programmable array logic (Chip) (PAL)

A Programmable Array Logic(PAL) is a prefabricated chip with macrocell structures connected via switching matrices. These are logics that the customer can program and configure according to his specific requirements.

During programming or configuration, connections of the various AND and OR gates that are not required are interrupted by overvoltage. These connections are sized to melt at a higher current. PALs, developed in the 1970s, are among the various programmable logic devices such as the various programmable logic devices( PLD) and field programmable devices such as field programmable gate arrays( FPGA). They differ from other programmable logic devices by a simple structure and compared to the Field Programmable Logic Array (FPLA) by the omission of the OR gates. For programming the PAL logics there is the programming language PALASM, which stands for PAL Assembler. PALASM is an older hardware description language with which Boolean functions and state diagrams are converted into circuit diagrams.

Generic Array Logics( GAL) have evolved from the PAL chips. GAL logics have the same properties as PAL logics, but are erasable and reprogrammable.

Englisch: programmable array logic (Chip) - PAL
Updated at: 25.10.2018
#Words: 177
Links: phase alternation line (TV) (PAL), chip, vertical interconnect access (PCB) (via), program, configuration (CFG)
Translations: DE

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