floating multiply-add (FMADD)

Floating Multiply-Add (FMADD) is a combined command for central processing units in which two mathematical operations are combined: multiplication and addition.

This command combination is specified by the manufacturers to determine the computing power. The combined FMADD instruction is included in the floating point operations per second( FLOPS) performance calculation, but as if it were two individual operations.

A 64-bit operation can be performed at double precision (dual precision) with a combined FMADD instruction in one clock. Such an operation could also be executed with single precision, but it would then require four clocks.