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dynamic random access memory (DRAM)

Dynamic RAM (DRAM) dates back to 1966 and is a dynamic read/write memory with relatively short access times that is used as mainmemory in personalcomputers(PCs) and workstations near the central processing unit.

The memory principle of DRAMs is based on the charging of MOS capacitors, which are addressed via switching transistors. A DRAM memory cell thus consists only of a transistor and a capacitor. The charge of the MOS capacitor represents the information. The individual memory cells are controlled for the purpose of storing the charge and reading it out line by line and column by column via separate word and bit lines.

Structure of a DRAM bit cell

Structure of a DRAM bit cell

However, since capacitors discharge and thus lose their memory charge, they must be regularly recharged. This memory update is done in a cyclic sequence of a few milliseconds by the refresh. During refresh, the information is read from the DRAM line by line at periodic intervals and the information read is written back to the memory without being changed. A disadvantage of this procedure is the performance degradation, which is expressed in a somewhat longer access time. The advantages are the high information density and the low power consumption as well as the associated lower heat generation.

Comparison of different RAM technologies

Comparison of different RAM technologies

DRAMs work with 8-bit buses, the access time is extremely short and is only a few nanoseconds, the clock rate is between 4.77 MHz and 40 MHz. DRAMs are also available with DDR technology, the Double Date Rate, in which the edges of the clock signal synchronize the read-in and read-out processes, resulting in a doubling of the data transfer rate.

In terms of structure, a DRAM consists of a memory matrix, an array of many DRAM memory elements. With a storage capacity of 4 megabytes( MB), the array consists of 4 million, exactly four times 1,048, 576 memory elements. In the meantime, there are DRAM chips with memory capacities of many gigabytes( GB). Corresponding packages are built as 3D ICs in stacked design, in which ten or more DRAM chips are stacked on top of each other and connected to each other with wire bonding or silicon through-platings.

Informations:
Englisch: dynamic random access memory - DRAM
Updated at: 29.04.2020
#Words: 354
Links: random access memory (RAM), memory, central processing unit (CPU), metal oxide semiconductor (Chip) (MOS), vertical interconnect access (PCB) (via)
Translations: DE
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